As IC devices achieve smaller and smaller geometries, damage to dielectric materials in the metal layers (e.g., interconnect layers) are more likely to have more damaging effects. These damaging effects can include damage to trenches within which conductive lines are situated. As damage occurs to the dielectric material, performance of the semiconductor or IC device can be degraded For example, damage can increase the dielectric constant of the dielectric material, thereby reducing the speed advantages of low-k materials.
Damage can occur to the sidewalls and bottoms of the trench and can affect the dielectric constant (K values) associated with the dielectric material. The damage not only affects the K value of the dielectric material, it also can adversely affect moisture absorption in the dielectric material, can modify the dielectric material or can cause other adverse consequences.
As advanced processing techniques (such as 65 nanometer (nm), 45 (nm) or below processes) are developed, the use of low-k dielectric material is preferred. Low-k dielectric materials (especially porous ultra low-k dielectric materials) can be damaged by plasma and/or ashing treatments associated with various etching and other process steps. Such low-k damage usually occurs on trench sidewalls and the bottom of trenches. In addition, advance processing techniques are etching low-k dielectric materials without the use of an etch stop layer (e.g. silicon nitride (SiyNx). The lack of an etch stop layer makes the low-k dielectric material even more susceptible to damage during processing techniques (e.g., plasma etching).
An article entitled “Materials, Technology and Reliability for Advanced Interconnects and Low-k Dielectrics” by F. Lacopi, Y. Travaly, M. Stucchil, H. Struyf, S. Peeters, R. Jonckheere, L. H. A. Leunissen, Zs. Tokei, V. Sutcliffe, O. Richard, M. Van Hove and K. Maex, in Mat. Res. Soc. Symp. Proc., (Vol. 812, F1.5, 2004) describes a low-k damage characterization method. The method in the article is used only on structures in a single metal layer with no bottom damage and the method is not capable of dealing with cases having serious bottom damage. The method of the article also does not have the advantage of minimizing the influence of K values in surrounding dielectrics on the final results. Accordingly, there is a need for an improved system for and an improved method of characterizing damage to low-k dielectric materials.
There is also need for a system of and a method for characterizing low-k dielectric material damage to a trench bottom or trench sidewall. Yet further still, there is a need for a low-k dielectric material characterization method that provides easy to obtain statistical results, is accurate and has increased sensitivity to smaller feature sizes. Yet further, there is a need for a semiconductor device qualification method using an improved dielectric material characterization technique. Further, there is a need for a method of qualifying interconnects (which include metal lines and surrounding dielectrics) which may be degraded by damage to dielectrics.
It would be desirable to provide a system and/or method that provides one or more of these or other advantageous features. Other features and advantages will be made apparent from the present specification. The teachings disclosed extend to those embodiments which fall within the scope of the appended claims, regardless of whether they accomplish one or more of the above-mentioned needs.